L3GD20TR datasheet(20/44 Pages) STMICROELECTRONICS

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Digital main blocks

L3GD20

20/44

Doc ID 022116 Rev 1

4.2.4

Bypass-to-stream mode

In Bypass-to-stream mode, the FIFO begins operating in Bypass mode and once a trigger

event occurs (related to INT1_CFG (30h) register events), the FIFO starts operating in

Stream mode. Refer to

Figure 10 below.

Figure 10.

Bypass-to-stream mode

4.2.5

Stream-to-FIFO mode

In Stream-to-FIFO mode, data from yaw, pitch and roll measurement is stored in the FIFO. A

watermark interrupt can be enabled on pin DRDY/INT2 by setting the I2_WTM bit in

CTRL_REG3 (22h) in order to be raised when the FIFO is filled to the level specified in the

WTM4:0 bits of FIFO_CTRL_REG (2Eh). The FIFO continues filling until it is full (32 slots of

16-bit data for yaw, pitch and roll). When full, the FIFO discards the older data as the new

data arrives. Once a trigger event occurs (related to INT1_CFG (30h) register events), the

FIFO starts operating in FIFO mode. Refer to

Figure 11 below.

Figure 11.

Trigger stream mode

x31

y31

z31

xi,yi,zi

Empty

Bypass mode

Stream mode

Trigger event

x31

y31

z31

xi,yi,zi

x30

y30

z30

AM07235v1

x31

y31

z31

xi,yi,zi

Stream Mode

FIFO Mode

Trigger event

x31

y31

z31

xi,yi,zi

x30

y30

z30

AM07236v1

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