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MCD212 Scheda tecnica(PDF) 39 Page - Motorola, Inc |
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MCD212 Scheda tecnica(HTML) 39 Page - Motorola, Inc |
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39 / 87 page ![]() MCD212 5–10 MOTOROLA Table 5–13. Register Map Channel No. Address (h) Register Name 1+2 80 to BF CLUT Color 0 – 63 1 C0 Image Coding Method 1 C1 Transparency Control 1 C2 Plane Order 1+2 C3 CLUT Bank 1 C4 Transparent Color for Plane A — C5 Reserved 2 C6 Transparent Color for Plane B 1 C7 Mask Color for Plane A — C8 Reserved 2 C9 Mask Color for Plane B 1 CA DYUV Abs. Start Value for Plane A 2 CB DYUV Abs. Start Value for Plane B — CC Reserved 1 CD Cursor Position 1 CE Cursor Control 1 CF Cursor Pattern 1+2 D0 to D7 Region Control 0 – 7 1 D8 Backdrop Color 1 D9 Mosaic Pixel Hold for Plane A 2 DA Mosaic Pixel Hold for Plane B 1 DB Weight Factor for Plane A 2 DC Weight Factor for Plane B — DD to FF Reserved 5.4.4.1 CLUT Color Register 0 - 63 (h80 - hBF) Programmable via CH#1 and CH#2. Table 5–14. CLUT Color Register 0 – 63 — Address h80 – hBF 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 R7 R6 R5 R4 R3 R2 — — G7 G6 G5 G4 G3 G2 — — B7 B6 B5 B4 B3 B2 — — R7 – R2, G7 – G2, and B7 – B2 contain the color–data of one pixel. Only the 6 MSBs per byte are implemented. The CLUT RAM is addressable in two steps. First, one of the four CLUT banks must be selected via the CLUT bank register (address A7, A6). Second, the address within the bank is given by selecting a CLUT register h80 – hBF. |
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