R5F2136CSNFA datasheet(49/61 Pages) RENESAS

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R8C/36T-A Group

4. Electrical Characteristics

R01DS0055EJ0100 Rev.1.00

Page 49 of 58

Dec 09, 2011

4.5

AC Characteristics

Note:

1. 1tCYC = 1/f1 (s)

Table 4.20

Timing Requirements of Clock Synchronous Serial I/O with Chip Select

(during Master Operation)

(Measurement conditions: Vcc = 1.8 V to 5.5 V, Topr =

20°C to 85°C (N version)/

40°C to 85°C (D version))

Symbol

Parameter

Conditions

Standard

Unit

Min.

Typ.

Max.

tSUCYC

SSCK clock cycle time

4.00

――

tCYC (1)

tHI

SSCK clock high width

0.40

―

0.60

tSUCYC

tLO

SSCK clock low width

0.40

―

0.60

tSUCYC

tRISE

SSCK clock rising time

2.7 V

 Vcc  5.5 V

――

0.50

tCYC (1)

1.8 V

 Vcc  2.7 V

――

1.00

tCYC (1)

tFALL

SSCK clock falling time

2.7 V

 Vcc  5.5 V

――

0.50

tCYC (1)

1.8 V

 Vcc  2.7 V

――

1.00

tCYC (1)

tSU

SSI, SSO data input setup time

4.5 V

 Vcc  5.5 V

――

2.7 V

 Vcc  4.5 V

――

1.8 V

 Vcc  2.7 V

100

――

SSI, SSO data input hold time

2.7 V

 Vcc  5.5 V

2.00

――

tCYC (1)

1.8 V

 Vcc  2.7 V

2.00

――

tCYC (1)

tLEAD

SCS-SCK output delay time

0.5 tSUCYC - 1 tCYC

――

tLAG

SCK -SCS output valid time

0.5 tSUCYC - 1 tCYC

――

tOD

SSO data output delay time

2.7 V

 Vcc  5.5 V

――

30.00

1.8 V

 Vcc  2.7 V

――

1.00

tCYC (1)

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