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R5F2136CSDFP Scheda tecnica(PDF) 18 Page - Renesas Technology Corp |
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R5F2136CSDFP Scheda tecnica(HTML) 18 Page - Renesas Technology Corp |
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18 / 61 page  R8C/36T-A Group 3. Address Space R01DS0055EJ0100 Rev.1.00 Page 18 of 58 Dec 09, 2011 X: Undefined Note: 1. The blank areas are reserved. No access is allowed. Table 3.3 SFR Information (3) (1) Address Symbol Register Name After Reset Remarks 0007Ah 0007Bh 0007Ch 0007Dh 0007Eh 0007Fh 00080h U0MR_0 UART0_0 Transmit/Receive Mode Register 00h 00081h U0BRG_0 UART0_0 Bit Rate Register XXh 00082h U0TB_0 UART0_0 Transmit Buffer Register XXh 00083h XXh 00084h U0C0_0 UART0_0 Transmit/Receive Control Register 0 00001000b 00085h U0C1_0 UART0_0 Transmit/Receive Control Register 1 00000010b 00086h U0RB_0 UART0_0 Receive Buffer Register XXXXh 00087h 00088h U0IR_0 UART0_0 Interrupt Flag and Enable Register 00h 00089h 0008Ah 0008Bh 0008Ch LINCR2_0 LIN_0 Special Function Register 00h 0008Dh 0008Eh LINCT_0 LIN_0 Control Register 00h 0008Fh LINST_0 LIN_0 Status Register 00h 00090h U0MR_1 UART0_1 Transmit/Receive Mode Register 00h 00091h U0BRG_1 UART0_1 Bit Rate Register XXh 00092h U0TB_1 UART0_1 Transmit Buffer Register XXh 00093h XXh 00094h U0C0_1 UART0_1 Transmit/Receive Control Register 0 00001000b 00095h U0C1_1 UART0_1 Transmit/Receive Control Register 1 00000010b 00096h U0RB_1 UART0_1 Receive Buffer Register XXXXh 00097h 00098h U0IR_1 UART0_1 Interrupt Flag and Enable Register 00h 00099h 0009Ah 0009Bh 0009Ch 0009Dh 0009Eh 0009Fh 000A0h 000A1h 000A2h 000A3h 000A4h 000A5h 000A8h 000A9h 000AAh 000ABh 000ACh 000ADh 000AEh 000AFh 000B0h 000B1h 000B4h 000B5h 000B8h 000B9h |
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