CD4066 datasheet(6/8 Pages) UTC

6 / 8 page

CD4066

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

6 of 8

www.unisonic.com.tw

QW-R502-739.A

SPECIAL CONSIDERATION

Using continuously under heavy loads may cause UTC CD4066 to decrease in the reliability even if the operating

conditions are within the absolute maximum ratings and the operating ranges.

In applications where separate power sources are used to drive VDD and the signal input, the VDD current capability

should exceed VDD/RL. This provision avoids any permanent current flow or clamp action of the VDD supply when

power is applied or removed from UTC CD4066.

AC TEST CIRCUIT AND SWITCHING TIME WAVEFORMS

tPLH

90%

50%

10%

50%

tPHL

VDD

VIS

VOS

Fig. 1 tPHL, tPLH Propagation Delay Time Signal Input to Signal Output

CONTROL

IN/OUT

OUT/IN

VDD

VSS

VIS

VCON=VDD

VDD

VOS

200kΩ

50pF

tPLZ

tPZL

VDD

VOL

VDD

tPZL

tPLZ

50%

10%

90%

Fig. 3 tPZL, tPLZ Propagation Delay Time Control to Signal Output

CONTROL

IN/OUT

OUT/IN

VDD

VSS

VIS=0V

VCON

VDD

VOS

1kΩ

50pF

VDD

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