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AD9557/PCBZ Scheda tecnica(PDF) 13 Page - Analog Devices

Il numero della parte AD9557/PCBZ
Spiegazioni elettronici  Dual Input Multiservice
PDF  92 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9557/PCBZ Scheda tecnica(HTML) 13 Page - Analog Devices

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Data Sheet
AD9557
Rev. A | Page 13 of 92
SERIAL PORT SPECIFICATIONS—I2C MODE
Table 16.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
SDA, SCL (AS INPUT)
Input Logic 1 Voltage
0.7 ×
DVDD3
V
Input Logic 0 Voltage
0.3 ×
DVDD3
V
Input Current
−10
+10
μA
For VIN = 10% to 90% DVDD3
Hysteresis of Schmitt Trigger Inputs
0.015 ×
DVDD3
Pulse Width of Spikes That Must Be Suppressed
by the Input Filter, tSP
50
ns
SDA (AS OUTPUT)
Output Logic 0 Voltage
0.4
V
IO = 3 mA
Output Fall Time from VIHmin to VILmax
20 + 0.1 Cb1
250
ns
10 pF ≤ Cb ≤ 400 pF1
TIMING
SCL Clock Rate
400
kHz
Bus-Free Time Between a Stop and Start Condition,
tBUF
1.3
μs
Repeated Start Condition Setup Time, tSU; STA
0.6
μs
Repeated Hold Time Start Condition, tHD;STA
0.6
μs
After this period, the first clock pulse
is generated
Stop Condition Setup Time, tSU; STO
0.6
μs
Low Period of the SCL Clock, tLOW
1.3
μs
High Period of the SCL Clock, tHIGH
0.6
μs
SCL/SDA Rise Time, tR
20 + 0.1 Cb1
300
ns
SCL/SDA Fall Time, tF
20 + 0.1 Cb1
300
ns
Data Setup Time, tSU; DAT
100
ns
Data Hold Time, tHD; DAT
100
ns
Capacitive Load for Each Bus Line, Cb1
400
pF
1 Cb is the capacitance (pF) of a single bus line.
JITTER GENERATION
Jitter generation (random jitter) uses 49.152 MHz crystal for system clock input.
Table 17.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
JITTER GENERATION
System clock doubler enabled;
high phase margin mode enabled;
Register 0x0405 = 0x20; Register 0x0403 =
0x07; Register 0x0400 = 0x81; in cases
where multiple driver types are listed,
both driver types were tested at those
conditions, and the one with higher jitter
is quoted, although there is usually not
a significant jitter difference between
the driver types
fREF = 19.44 MHz; fOUT = 622.08 MHz; fLOOP = 50 Hz
HSTL Driver
Bandwidth: 5 kHz to 20 MHz
304
fs rms
Bandwidth: 12 kHz to 20 MHz
296
fs rms
Bandwidth: 20 kHz to 80 MHz
300
fs rms
Bandwidth: 50 kHz to 80 MHz
266
fs rms
Bandwidth: 16 MHz to 320 MHz
185
fs rms



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