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DM9010BI Scheda tecnica(PDF) 49 Page - Davicom Semiconductor, Inc. |
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DM9010BI Scheda tecnica(HTML) 49 Page - Davicom Semiconductor, Inc. |
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49 / 60 page ![]() DM9010BI Industrial-temperature Single Chip Ethernet Controller with General Processor Interface Preliminary 49 Version: DM9010BI--DS-P01 January 12, 2010 10.3.5 Processor I/O Write Timing Symbol Parameter Min. Typ. Max. Unit T1 System Address(SA) valid to IOW# valid 0 ns T2 IOW# width 10 ns T3 System Data(SD) setup time 3 ns T4 System Data (SD) hold time 3 ns T5 IOW# invalid to System Address(SA) invalid 0 ns T6 IOW# Invalid to next IOW#/IOR# valid When write DM9010BI INDEX port 1 clk* T6 IOW# Invalid to next IOW#/IOR# valid When write DM9010BI DATA port 2 clk* T2+T6 IOW# valid to next IOW#/IOR# valid When write DM9010BI memory 1 clk* T7 System Address(SA) valid to IO16, IO32 valid 3 ns T8 System Address(SA) invalid to IO16, IO32 invalid 3 ns Note:(The default clk period is 20ns) 1. The IO16 is valid when the SD bus width is 16-bit or 32-bit and system address is DATA port (i.e. CMD is high) and the value of INDEX port is memory data register index (ex. F0H, F2H, F6H or F8H) 2. The IO32 is valid when the SD bus width is 32-bit and system address is DATA port (i.e. CMD is high) and the value of INDEX port is memory data Register index (ex. F0H, F2H, F6H or F8H) T1 T4 AEN,SA → → → ← T6 ← ← IOW T2 → ∫∫ ← SD → ← T3 T8 T7 → → ← ← IO16,IO32 ← → T5 Note1.2 ,CMD |
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