MPC5744P datasheet(98/114 Pages) FREESCALE

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MPC5744P Data Sheet, Rev. 0.3

Preliminary—Subject to Change Without Notice

Electrical characteristics

Freescale Semiconductor

Figure 28. External interrupt timing

3.17.5

DSPI timing

Table 45. DSPI timing

No.

Symbol

Parameter

Conditions

Min

Max

Unit

1tSCK CC

DSPI cycle time

Master (MTFE = 0)

—

Slave (MTFE = 0)

—

Slave Receive Only Mode1

—

2tCSC CC

PCS to SCK delay

—

3tASC CC

After SCK delay

—

4tSDC CC

SCK duty cycle

—

tSCK/2 - 10 tSCK/2 + 10 ns

5tA

Slave access time

SS active to SOUT valid

—

6tDIS

Slave SOUT disable time

SS inactive to SOUT High-Z or invalid

—

7tPCSC CC

PCSx to PCSS time

—

8tPASC CC

PCSS to PCSx time

—

9tSUI

Data setup time for inputs

Master (MTFE = 0)

—

Slave

2—

Master (MTFE = 1, CPHA = 0)

5—

Master (MTFE = 1, CPHA = 1)

—

tHI

Data hold time for inputs

Master (MTFE = 0)

–5

—

Slave

—

Master (MTFE = 1, CPHA = 0)

—

Master (MTFE = 1, CPHA = 1)

–5

—

tSUO CC

Data valid (after SCK edge)

Master (MTFE = 0)

—

Slave

—

Master (MTFE = 1, CPHA = 0)

—

Master (MTFE = 1, CPHA = 1)

—

IRQ

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