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Motore di ricerca datesheet componenti elettronici |
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Motore di ricerca datesheet componenti elettronici |
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SP8530AS Scheda tecnica(PDF) 8 Page - Sipex Corporation |
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SP8530AS Scheda tecnica(HTML) 8 Page - Sipex Corporation |
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8 / 12 page  SP8530DS/01 SP8530 S2ADC TM - Simultaneous Sampling Analog to Digital Converter © Copyright 2000 Sipex Corporation 8 TIMING CHARACTERISTICS (Typical @ 25 °C with V DD = +5V, unless otherwise noted) PARAMETER MIN. TYP. MAX .UNIT COND. Thoughput Time (tTP=tA+tC) 8.25 µs Acquisition Time (tA) (2 SCLK Periods) 400 500 ns Conversion Time (tC) (31 SCLK Periods) 7.75 µs SCLK Low Pulse Width (tSKL) 110 125 ns SCLK High Pulse Width (tSKH) 110 125 ns SCLK Period (tSKT) 250 ns Buss Access Time (tCBA) 51 ns Buss Relinquish Time (tBR) 45 ns Setup Time -SCLK Falling to CSN Falling (tCSSU) 0 ns CSN Low Before SCLK Rises (tCS) 90 ns SCLK Falling to Data Valid (tSD) 50 ns CSN Falling to status Rising (tDCS) 69 ns SCLK 33 Falling to Status Rising Free Run (tDSS) 70 ns SCLK32 Falling to Status Falling ( tDSE) 45 ns Delay SD Low to initiate Conversion (tpu) 5 µs Aperture Delay Slave-Mode (tAPC) 30 ns Aperture Delay Free-Running Mode (tAPS) 35 ns |
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