SST30VR043 datasheet(7/10 Pages) SST

Il numero della parte	SST30VR043

Spiegazioni elettronici	4 Mbit ROM 1 Mbit / 256 Kbit SRAM ROM/RAM Combo

PDF	10 Pages

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Produttore elettronici	SST [Silicon Storage Technology, Inc]

Homepage	http://www.sst.com/

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7 / 10 page

Preliminary Specifications

4 Mbit ROM + 1 Mbit / 256 Kbit SRAM ROM/RAM Combo

SST30VR041 / SST30VR043

S71134-02-000

4/01

381

FIGURE 6: SRAM READ CYCLE TIMING DIAGRAM (ADDRESS CONTROLLED) (OE#/RAMCS# = VIL, WE# = VIH)

FIGURE 7: SRAM READ CYCLE TIMING DIAGRAM (OE#/RAMCS# CONTROLLED)

TRC

TAA

Data Valid

381 ILL F04.0

Data Out

Previous Data Valid

Address

TOH

TRC

TAA

TCO

TLZ(2)

TOH

THZ(1,2)

Data Valid

381 ILL F05.0

Data Out

OE#/RAMCS#

High-Z

Address

Notes: 1. THZ and TOHZ are defined as the time at which the outputs achieve the open circuit condition

and are referenced to the VOH or VOL.

2. At any given temperature and voltage condition THZ(max) is less than TLZ(min) both for a given

device and from device to device.

3. WE# is high for Read cycle.

SST30VR043 Scheda tecnica(PDF) 7 Page - Silicon Storage Technology, Inc