SST48CF024 datasheet(22/60 Pages) SST

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Data Sheet

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SST48CF008 / 016 / 024 / 032 / 048 / 064 / 096 / 128 / 192 / 256

S71125-03-000

9/01

375

2.3.13 True IDE Mode I/O Output (Write) Timing Specification

Note: The maximum load on -IOIS16 is 1 LSTTL with 50pF total load.

All AC specifications are guaranteed by design.

FIGURE

2-8: True IDE Mode I/O Write Timing Diagram

TABLE

2-10: TRUE IDE MODE I/O WRITE TIMING

Item

Symbol

IEEE Symbol

Min1

1. All times are in nanoseconds.

Max1

Data Setup before IOWR

tsu(IOWR)

tDVIWH

Data Hold following IOWR

th(IOWR)

tlWHDX

IOWR Width Time

tw(IOWR)

tlWLIWH

Address Setup before IOWR

tsuA(IOWR)

tAVIWL

Address Hold following IOWR

thA(IOWR)

tlWHAX

CE Setup before IOWR

tsuCE(IOWR)

tELIWL

CE Hold following IOWR

thCE(IOWR)

tlWHEH

IOIS16 Delay Falling from Address

tdfIOIS16(ADR)

tAVISL

IOIS16 Delay Rising from Address

tdrIOIS16(ADR)

tAVISH

T2-10.2 375

375 ILL2-8.0

-CE

tdrIOIS16(ADR)

tdfIOIS16(ADR)

thA(IOWR)

thCE(IOWR)

th(IOWR)

tsu(IOWR)

Din Valid

tsuA(IOWR)

tsuCE(IOWR)

tw(IOWR)

-IORD

-IOIS16

Din

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