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TLC320AD56 Scheda tecnica(PDF) 40 Page - Texas Instruments |
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TLC320AD56 Scheda tecnica(HTML) 40 Page - Texas Instruments |
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40 / 42 page ![]() A–2 Table A–3. Control 2 Register BITS DESCRIPTION D7 D6 D5 D4 D3 D2 D1 D0 DESCRIPTION – – X – – – – – Decimator FIR overflow flag (valid only during read cycle) – – – X – – – – FLAG 1 output value (valid only during read cycle) – – – – X – – – FLAG 0 output value (valid only during read cycle) – – – – – 1 – – Phone mode enabled – – – – – 0 – – Phone mode disabled X X – – – – X X Reserved NOTES: A. Default value: 00000000 B. X = do not care Writing 0s to the reserved bits is suggested. |
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