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STM8S207MBT3 Scheda tecnica(PDF) 44 Page - STMicroelectronics |
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STM8S207MBT3 Scheda tecnica(HTML) 44 Page - STMicroelectronics |
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44 / 103 page ![]() Memory and register map STM8S207xx, STM8S208xx 44/103 Doc ID 14733 Rev 12 0x00 7F98 DM DM_CSR1 DM debug module control/status register 1 0x10 0x00 7F99 DM_CSR2 DM debug module control/status register 2 0x00 0x00 7F9A DM_ENFCTR DM enable function register 0xFF 0x00 7F9B to 0x00 7F9F Reserved area (5 bytes) 1. Accessible by debug module only 2. Product dependent value, see Figure 8: Memory map. Table 10. CPU/SWIM/debug module/interrupt controller registers (continued) Address Block Register Label Register Name Reset Status |
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