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MMPF0100 Scheda tecnica(PDF) 26 Page - Freescale Semiconductor, Inc |
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MMPF0100 Scheda tecnica(HTML) 26 Page - Freescale Semiconductor, Inc |
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26 / 136 page ![]() VINREFDDR VREFDDR VINREFDDR CHALF1 Discharge + _ VHALF VREFDDR CHALF2 100 nf 100 nf CREFDDR 1.0 uf Analog Integrated Circuit Device Data 26 Freescale Semiconductor PF0100 Functional Block Requirements and Behaviors Bias and References Block Description Figure 6. VREFDDR Block Diagram 7.3.2.1 VREFDDR Control Register The VREFDDR voltage reference is controlled by a single bit in VREFDDCRTL register in Table 19. External Components Table 19. Register VREFDDCRTL - ADDR 0x6A Name Bit # R/W Default Description UNUSED 3:0 – 0x00 UNUSED VREFDDREN 4 R/W 0x00 Enable or disables VREFDDR output voltage 0 = VREFDDR Disabled 1 = VREFDDR Enabled UNUSED 7:5 – 0x00 UNUSED Table 20. VREFDDR External Components(22) Capacitor Capacitance ( μF) VINREFDDR(23) to VHALF 0.1 VHALF to GND 0.1 VREFDDR 1.0 Notes 22. Use X5R or X7R capacitors. 23. VINREFDDR to GND, 1.0 μF minimum capacitance is provided by buck regulator output. |
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