STULPI01A_12 datasheet(21/44 Pages) STMICROELECTRONICS

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STULPI01A, STULPI01B

Block description

Doc ID 14817 Rev 4

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and sensing. The digital part consists of a serializer and deserializer, transforming serial bit

stream to 8-bit parallel port, and finite state machine implementing the PHY protocol layer,

bit stuffing, unstuffing, etc.

Figure 7.

USB 2.0 PHY block diagram

6.12

Power saving features

To reduce power consumption, the STULPI01 implements 2 Low-power modes of operation.

Low-power mode, which is defined in the ULPI specification.

Power-down mode to save more power in case USB function is not needed.

More information on these modes can be found in the following paragraphs.

6.13

Modes of operation

6.13.1

ULPI synchronous mode

The STULPI01 transceiver supports SDR mode operation (12-pin interface). The selection

of SDR mode is performed during the startup reset procedure.

6.13.2

6-pin FS/LS serial mode

This mode is entered by writing to the corresponding bit in the Interface Control register.

6.13.3

3-pin FS/LS serial mode

This mode is entered by writing to the corresponding bit in the Interface Control register.

Ser-Des

LS/FS

Ser-Des

HS Disconnect Det.

Squelch Detector

LS/FS SE Receivers

3.3 V

19.25 k

AM04949v2

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