Clock operation

M41T00CAP

16/27

Doc ID 14557 Rev 5

for correction. Note that setting or changing the calibration byte does not affect the

frequency test output frequency. The FT/OUT pin is an open drain output which requires a

to control the rise time. The FT bit is cleared on power-down.

Figure 10.

Crystal accuracy across temperature

Figure 11.

Clock calibration

4.3

Century bit

Bits D7 and D6 of clock register 02h contain the century enable bit (CEB) and the century bit

(CB). Setting CEB to a '1' will cause CB to toggle, either from a '0' to '1' or from '1' to '0' at

the turn of the century (depending upon its initial state). If CEB is set to a '0,' CB will not

toggle.

AI07888

–160

0

10203040506070

Frequency (ppm)

Temperature

°C

80

–10

–20

–30

–40

–100

–120

–140

–40

–60

–80

20

0

–20

= –0.036 ppm/

°C

K

ΔF

= K x (T – T

2

F

T

AI00594B

NORMAL

POSITIVE

CALIBRATION

NEGATIVE

CALIBRATION