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STW82102B Scheda tecnica(PDF) 12 Page - STMicroelectronics |
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STW82102B Scheda tecnica(HTML) 12 Page - STMicroelectronics |
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12 / 67 page ![]() Operating conditions STW82102B 12/67 Doc ID 018516 Rev 2 4 Operating conditions Table 4. Operating conditions Symbol Parameter Test conditions Min Typ Max Unit AVCC1 Analog Supply voltage - 3.15 3.3 3.45 V AVCC2 Analog Supply voltage - 4.75 5 5.25 V DVCC Digital Supply voltage - 3.15 3.3 3.45 V ICC3.3V Current Consumption at 3.3 V Standard mode - 130 150 mA External VCO standard mode - 110 130 mA Diversity slave mode - 105 120 mA Diversity master mode - 155 180 mA External VCO diversity master mode -140 160 mA ICC5V Current Consumption High current mode at 5 V - 160 185 mA Low current mode at 3.3 V - 95 110 mA TA Operating ambient temperature - -40 85 °C TJ Maximum junction temperature - - 125 °C ΘJA Junction to ambient package thermal resistance(1) Multi-layer JEDEC board - 33 - °C/W ΘJB Junction to board package thermal resistance(1) Multi-layer JEDEC board - 19 - °C/W ΘJC Junction to case package thermal resistance(1) Multi-layer JEDEC board - 3 - °C/W ΨJB Thermal characterization parameter junction to board(1) Multi-layer JEDEC board - 18 - °C/W ΨJT Thermal characterization parameter junction to top case(1) Multi-layer JEDEC board - 0.3 - °C/W 1. Refer to JEDEC standard JESD 51-12 for a detailed description of the thermal resistances and thermal parameters. Data here presented are referring to a Multi-layer board according to JEDEC standard. TJ = TA + ΘJA * Pdiss (in order to estimate TJ if ambient temperature TA and dissipated power Pdiss are known) TJ = TB + ΨJB * Pdiss (in order to estimate TJ if board temperature TB and dissipated power Pdiss are known) TJ = TT + ΨJT * Pdiss (in order to estimate TJ if top case temperature TT and dissipated power Pdiss are known) |
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