CXP508L4 datasheet(5/11 Pages) SONY

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CXP508L4/508L6

Electrical Characteristics

DC characteristics

(Ta = –20 to +75°C, VSS = 0V)

Item

High level output

voltage

VOH

PA to PF∗1,

PX0 to PX2,

PY0, PY1,

VL (VOL only)

VDD = 2.4V, IOH = –0.3mA∗2

VDD = 2.4V, IOH = –0.5mA∗2

VDD = 2.4V, IOH = –5µA∗3

VDD = 2.4V, IOH = –10µA∗3

VDD = 2.4V, IOL = 1.0mA

VDD = 2.4V, IOL = 2.0mA

VDD = 3.5V, VIH = 3.5V

VDD = 3.5V, VIL = 0.4V

1.8

1.4

1.8

1.4

0.3

–0.3

–1.5

1.3

0.6

0.4

0.6

–20

–200

–1.0

±5

1.2

µA

Ω

µA

VDD = 3.5V

VI = 0, 3.5V

VDD = 3.5V

VLC1 = 2.65V

VLC2 = 1.75V

VLC3 = 0.88V

VDD = 3.5V During external clock

1MHz operation

Entire output pins open

Clock 1MHz

0V other than the measured

pins

SLEEP mode

STOP mode

EXTAL∗4

RST∗5

PA to PF∗6,

PX0 to PX2∗6,

PX3∗8, PY0∗7,

PY1∗7, PY2∗8,

PY3∗8, INT1∗8,

WP∗8, RST∗5

COM0 to COM3

SEG0 to SEG15

SEG16 to SEG23∗1

VDD

VLC1 to VLC3,

COM0 to COM3,

SEG0 to SEG15,

SEG16 to SEG23∗1,

Other pins than VDD,

VSS

VOL

IIH

IILE

IILR

IIL

IIZ

RCOM

RSEG

IDD

IDDSP

IDDS

CIN

Low level output

voltage

Input current

High impedance

I/O leakage current

Common output

impedance

Segment output

impedance

Current power

supply

Input capacitance

Symbol

Condition

Min.

Typ.

Max.

Unit

∗1 The PE to PF show when the combined pins are selected as the port, and SEG16 to SEG23 show when

the combined pins are selected as the segment output.

∗2 It is when the respective pins of PA to PF and PX0 to PX2 select the 3-state output circuit, and PY0 and

PY1 are when the inverter output circuit is selected.

∗3 It is when the respective pins of PA to PF, PX0 to PX2, PY0 and PY1 select the pull-up resistance.

∗4 It is when the crystal or ceramic oscillation circuit is selected.

∗5 The RST pin specifies the input current when the pull-up resistance is selected, and specifies leakage

current when non-resistance is selected.

∗6 The respective pins of PA to PF and PX0 to PX2 specify the input current when the pull-up resistance is

selected, and specify the leakage current when in the port state during the 3-state output circuit or standby

is selected at high impedance.

∗7 The respective pins of PY0 and PY1 specify the input current when the pull-up resistance is selected, and

specify the leakage current when in the port state during standby is selected at high impedance.

∗8 The respective pins of PX3, PY2, PY3, INT1 and WP only specify the leakage current.

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