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CXP-82220 Scheda tecnica(PDF) 4 Page - Sony Corporation

Il numero della parte CXP-82220
Spiegazioni elettronici  CMOS 8-bit Single Chip Microcomputer
PDF  21 Pages
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Produttore elettronici  SONY [Sony Corporation]
Homepage  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXP-82220 Scheda tecnica(HTML) 4 Page - Sony Corporation

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CXP82220/82224
Pin Description
– 4 –
(Port A)
8-bit I/O port. I/O can be
set in a unit of single bit .
(8 pins)
(Port B)
8-bit I/O port. I/O for lower
7 bits can be set in a unit
of single bit. Uppermost
bit (PB7) is for output only.
(8 pins)
(Port C)
8-bit I/O port. I/O can be
set in a unit of single bits.
Capable of driving 12mA
synk current. (8 pins)
(Port D)
8-bit output port.
(8 pins)
(Port E)
8-bit port. Lower 6 bits are
for inputs; upper 2 bits are
for outputs.
(8 pins)
(Port F)
8-bit output port.
(8 pins)
(Port G)
8-bit I/O port. I/O can be
set in a unit of single bit.
Data for the lower 4 bits
are gated with the contents
of RTO or OR-gate output.
(8 pins)
Analog inputs to A/D converter.
(8 pins)
External capture input to 16bittimer/counter.
Chip select input for serial interface (CH0).
Serial clock I/O (CH0).
Serial data input (CH0).
Serial data output (CH0).
Serial clock I/O (CH1).
Serial data input (CH1).
Serial data output (CH1).
Serves as key return inputs when operating
key scan with FDP segment signal.
FDP segment signal outputs.
Inputs for
external
interruption
request.
(4 pins)
Remote control reception circuit input.
Input for CTL duty ditection circuit.
14-bit PWM output.
Output for the 16-bit timer/counter
rectangular waves, CTU duty detection,
and 32kHz oscillation frequuency
demultiplication.
Outputs for real-time pulse generator (RTG).
Functions as high-precision, real-time pulse
output port.
(4 pins)
Symbol
I/O
Functions
PA0/AN0
to
PA7/AN7
PB0/CINT
PB1/CS0
PB2/SCK0
PB3/SI0
PB4/SO0
PB5/SCK1
PB6/SI1
PB7/SO1
PC0/KR0
to
PC7/KR7
PD0/S0
to
PD7/S7
PE0/INT0/EC0
PE1/INT1/EC1
PE2/INT2
PE3/INT3/NMI
PE4/RMC
PE5/CTL
PE6/PWM
PE7/TO/DDO/
ADJ
PF0/S8
to
PF7/S15
PG0/RTO0
to
PG3/RTO3
PG4 to PG7
I/O/
Analog input
I/O/Input
I/O/Input
I/O/I/O
I/O/Input
I/O/Output
I/O/I/O
I/O/Input
Output/Output
I/O/Input
Output/Output
Input/Input/Input
Input/Input/Input
Input/Input
Input/Input/Input
Input/Input
Input/Input
Output/Output
Output/Output/
Output/Output
Output/Output
I/O/Output
I/O
External event inputs for
timer/counter.
(2 pins)
Non-maskable
interruption request input.
FDP segment signal
outputs.



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