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CXP83408 Scheda tecnica(PDF) 9 Page - Sony Corporation |
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CXP83408 Scheda tecnica(HTML) 9 Page - Sony Corporation |
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9 / 24 page ![]() – 9 – CXP83408/83412/83416, CXP83409/83413/83417 2 pins Hi-Z Hi-Z Pin When reset Circuit format PB4/SO0 PB7/SO1 PC0 to PC7 8 pins 5 pins Hi-Z PE0/INT0/EC PE1/INT1 PE2/INT2 PE3/INT3/NMI PE4/RMC IP Schmitt input INT0/EC INT1 INT2 INT3/NMI RMC Data bus RD (Port E) IP Pull-up resistor Port C data Port C direction “0” when reset RD (Port C) Data bus ∗1 Large current 12mA ∗2 Pull-up transistors approx. 100k Ω ∗2 “0” when reset ∗1 ∗ Pull-up transistors approx. 100k Ω Pull-up resistor Port B data Port B direction “0” when reset RD (Port B) Data bus IP ∗ “0” when reset Output enable Port B output selection “0” when reset SO Port E Port C Port B |
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