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WM8976CGEFL/V Scheda tecnica(PDF) 34 Page - Wolfson Microelectronics plc |
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WM8976CGEFL/V Scheda tecnica(HTML) 34 Page - Wolfson Microelectronics plc |
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34 / 114 page ![]() WM8976 Production Data w PD, Rev 4.5, November 2011 34 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 0010 90.8us 726us 5.23ms … (time doubles with every step) 1010 or higher 23.2ms 186ms 1.34s Table 18 ALC Control Registers WHEN THE ALC IS DISABLED, THE INPUT PGA REMAINS AT THE LAST CONTROLLED VALUE OF THE ALC. AN INPUT GAIN UPDATE MUST BE MADE BY WRITING TO THE INPPGAVOLL/R REGISTER BITS. NORMAL MODE In normal mode, the ALC will attempt to maintain a constant signal level by increasing or decreasing the gain of the PGA. The following diagram shows an example of this. Figure 18 ALC Normal Mode Operation |
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