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WM8321 Scheda tecnica(PDF) 27 Page - Wolfson Microelectronics plc |
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WM8321 Scheda tecnica(HTML) 27 Page - Wolfson Microelectronics plc |
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27 / 253 page  Production Data WM8321 w PD, February 2012, Rev 4.0 27 10 SIGNAL TIMING REQUIREMENTS 10.1 CONTROL INTERFACE Figure 1 Control Interface Timing - 2-wire (I2C) Control Mode Test Conditions TJ = -40ºC to +125 ºC unless otherwise stated. PARAMETER SYMBOL MIN TYP MAX UNIT SCLK1 Frequency 0 400 kHz SCLK1 Low Pulse-Width t1 1300 ns SCLK1 High Pulse-Width t2 600 ns Hold Time (Start Condition) t3 600 ns Setup Time (Start Condition) t4 600 ns Data Setup Time t5 100 ns SDA1, SCLK1 Rise Time t6 300 ns SDA1, SCLK1 Fall Time t7 300 ns Setup Time (Stop Condition) t8 600 ns Data Hold Time t9 900 ns Pulse width of spikes that will be suppressed tps 0 5 ns |
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