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WM8325 Scheda tecnica(PDF) 31 Page - Wolfson Microelectronics plc |
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WM8325 Scheda tecnica(HTML) 31 Page - Wolfson Microelectronics plc |
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31 / 254 page  Production Data WM8325 w PD, February 2012, Rev 4.0 31 The valid power state transitions are illustrated in Figure 4. Figure 4 Power States and Transitions State transitions to/from the NO POWER state are controlled automatically by the internal supply (VPMIC) voltage generated by LDO12. The device is in the NO POWER state when this voltage is below the Power-On Reset (POR) threshold. See Section 24 for more details on Power-On Reset. State transitions to/from the BACKUP state are controlled automatically by the internal supply (VPMIC) voltage generated by LDO12. The device is in the BACKUP state when this voltage is below the Device Reset threshold. See Section 24 for more details on Resets. State transitions to/from the PROGRAM state are required to follow specific control sequences. See Section 14 for details of the PROGRAM functions. |
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