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WM8352 Scheda tecnica(PDF) 73 Page - Wolfson Microelectronics plc

Il numero della parte WM8352
Spiegazioni elettronici  Wolfson AudioPlus™ Stereo CODEC with Power Management
PDF  336 Pages
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Produttore elettronici  WOLFSON [Wolfson Microelectronics plc]
Homepage  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8352 Scheda tecnica(HTML) 73 Page - Wolfson Microelectronics plc

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Production Data
WM8352
w
PD, February 2011, Rev 4.4
73
13.6 DIGITAL MIXING
13.6.1
DIGITAL SIDETONE
A digital sidetone is available when ADCs and DACs are operating at the same sample rate. Digital
data from either left or right ADC can be mixed with the audio interface data on the left and right DAC
channels. Sidetone data is taken from the ADC high pass filter output, to reduce low frequency noise
in the sidetone (e.g. wind noise or mechanical vibration).
The digital sidetone will not function when ADCs and DACs are operating at different sample rates.
When using the digital sidetone, it is recommended that the ADCs are enabled before un-muting the
DACs to prevent pop noise. The DAC volumes and sidetone volumes should be set to an appropriate
level to avoid clipping at the DAC input.
The digital sidetone is controlled as shown Table 29.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R68 (44h)
ADC
Divider
11:8
ADCL_DAC_SVOL
[3:0]
0000
Controls left digital side tone volume
from -36dB to 0dB in 3dB steps.
0000 = -36dB
0001 = -33dB
… (3dB steps)
1011 = -3dB
1100 = 0dB
11XX = 0dB
7:4
ADCR_DAC_SVOL
[3:0]
0000
Controls right digital side tone
volume from -36dB to 0dB in 3dB
steps.
0000 = -36dB
0001 = -33dB
… (3dB steps)
1011 = -3dB
1100 = 0dB
11XX = 0dB
R60 (3Ch)
Digital Side
Tone
Control
13:12
ADC_TO_DACL
[1:0]
00
DAC Left Side-tone Control
11 = Unused
10 = Mix ADCR into DACL
01 = Mix ADCL into DACL
00 = No Side-tone mix into DACL
11:10
ADC_TO_DACR
[1:0]
00
DAC Right Side-tone Control
11 = Unused
10 = Mix ADCR into DACR
01 = Mix ADCL into DACR
00 = No Side-tone mix into DACR
Table 29 Digital Side Tone Control
The coding of ADCL_DAC_SVOL and ADCR_DAC_SVOL is described in Table 30.



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