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WM8352 Scheda tecnica(PDF) 267 Page - Wolfson Microelectronics plc

Il numero della parte WM8352
Spiegazioni elettronici  Wolfson AudioPlus™ Stereo CODEC with Power Management
PDF  336 Pages
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Produttore elettronici  WOLFSON [Wolfson Microelectronics plc]
Homepage  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8352 Scheda tecnica(HTML) 267 Page - Wolfson Microelectronics plc

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Production Data
WM8352
w
PD, February 2011, Rev 4.4
267
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
4
GP4_PD
0
0
1
0
GPIO4 pull-down
0 = Normal
1 = Pull-down enabled
(Only valid when GPIO4 is set to input. Do not select
pull-up and pull-down at the same time.)
Reset by state machine. Default held in metal mask.
3
GP3_PD
0
0
0
0
GPIO3 pull-down
0 = Normal
1 = Pull-down enabled
(Only valid when GPIO3 is set to input. Do not select
pull-up and pull-down at the same time.)
Reset by state machine. Default held in metal mask.
2
GP2_PD
0
0
0
0
GPIO2 pull-down
0 = Normal
1 = Pull-down enabled
(Only valid when GPIO2 is set to input. Do not select
pull-up and pull-down at the same time.)
Reset by state machine. Default held in metal mask.
1
GP1_PD
0
0
0
0
GPIO1 pull-down
0 = Normal
1 = Pull-down enabled
(Only valid when GPIO1 is set to input. Do not select
pull-up and pull-down at the same time.)
Reset by state machine. Default held in metal mask.
0
GP0_PD
0
0
0
0
GPIO0 pull-down
0 = Normal
1 = Pull-down enabled
(Only valid when GPIO0 is set to input. Do not select
pull-up and pull-down at the same time.)
Reset by state machine. Default held in metal mask.
Register 82h GPIO Pull down Control
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
REFER TO
R131 (83h)
GPIO
Interrupt
Mode
12
GP12_INTMODE
0
GPIO12 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP12_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
11
GP11_INTMODE
0
GPIO11 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP11_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.
10
GP10_INTMODE
0
GPIO10 Pin Mode
0 = GPIO interrupt is rising edge triggered, and is
taken after the effect of the GP10_CFG register bit.
1 = GPIO interrupt is both rising and falling edge
triggered.
Reset by state machine.



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