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EVAL-AD1958EB Scheda tecnica(PDF) 2 Page - Analog Devices

Il numero della parte EVAL-AD1958EB
Spiegazioni elettronici  PLL/Multibit DAC
PDF  8 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

EVAL-AD1958EB Scheda tecnica(HTML) 2 Page - Analog Devices

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REV. 0
–2–
AD1958–SPECIFICATIONS
TEST CONDITIONS UNLESS OTHERWISE NOTED
Supply Voltages
(AVDD, DVDD, PVDD)
5.0 V
Ambient Temperature
25
°C
Input Clock
12.288 MHz (256
× fS Mode)
Input Signal
996.0938 Hz,
0 dB Full Scale
Input Sample Rate
48 kHz
Measurement Bandwidth
20 Hz to 20 kHz
Word Width
24 Bits
Load Capacitance
100 pF
Load Impedance
47 k
Ω
Input Voltage HI
2.0 V
Input Voltage LO
0.8 V
ANALOG PERFORMANCE
Min
Typ
Max
Unit
Resolution
24
Bits
Signal-to-Noise Ratio (20 Hz to 20 kHz)
No Filter (Stereo)
105
dB
With A-Weighted Filter (Stereo)
108
dB
Dynamic Range (20 Hz to 20 kHz, –60 dB Input)
No Filter (Stereo)
105
dB
With A-Weighted Filter (Stereo)
102
109
dB
Total Harmonic Distortion + Noise (Stereo)
–90
–96
dB
PLL Performance
Master Clock Input Frequency
27
MHz
Generated System Clocks
SCLK0
33.8688
MHz
SCLK1
12.288
MHz
SCLK2
22.5792
MHz
Jitter (SCLK0 and SCLK1)
110
175
ps rms
Jitter (MCLK)
60
100
ps rms
Duty Cycle (SCLK0, SCLK1)
1
50
%
Duty Cycle (MCLK)
49
50
51
%
Analog Outputs
Single-Ended Output Range (
±Full Scale)
3.17
V p-p
Output Capacitance at Each Output Pin
2
pF
Out-of-Band Energy (0.5
× f
S to 100 kHz)
–90
dB
VREF (FILTR)
2.39
V
DC Accuracy
Gain Error
–5
±2.0
+5
%
Interchannel Gain Mismatch
–0.15
±0.015
+0.15
dB
Gain Drift
150
250
ppm/
°C
DC Offset
–25
–3
+20
mV
Interchannel Crosstalk (EIAJ Method)
–120
dB
Interchannel Phase Deviation
±0.1
Degrees
Mute Attenuation
–100
dB
De-Emphasis Gain Error
±0.1
dB
NOTES
1In some combinations with Clock Configuration Mode = 1 (see Table III), SCLK will not be 50%.
2Performance of right and left channels is identical (exclusive of the Interchannel Gain Mismatch and Interchannel Phase Deviation specifications).
Specifications subject to change without notice.
DIGITAL I/O (–40
°C to +105°C )
Min
Typ
Max
Unit
Input Voltage HI (VIH)
2.0
V
Input Voltage LO (VIL)
0.8
V
Input Leakage (IIH @ VIH = 2.4 V)
10
µA
Input Leakage (IIL @ VIL = 0.8 V)
10
µA
High Level Output Voltage (VOH) IOH = 1 mA
3.5
V
Low Level Output Voltage (VOL) IOL = 1 mA
0.4
V
Input Capacitance
20
pF
Specifications subject to change without notice.



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