AD5301 datasheet(12/15 Pages) AD

12 / 15 page

REV. 0

AD5301/AD5311/AD5321

–12–

READ OPERATION

When reading data back from the AD5301/AD5311/AD5321

DACs, the user must begin with an address byte after which the

DAC will acknowledge that it is prepared to transmit data by

pulling SDA low. There are two different read operations. In the

case of the AD5301, the readback is a single byte that consists

SCL

SDA

A1*

*THIS BIT MUST BE 0 IN THE 6-PIN SOT-23 VERSION.

ACK

AD5301

START

COND

MASTER

ADDRESS BYTE

NO ACK

MASTER

STOP

COND

MASTER

DATA BYTE

Figure 27. AD5301 Readback Sequence

SCL

SDA

SCL

SDA

PD1

PD0

A1*

NO ACK

MASTER

STOP

COND

MASTER

LEAST SIGNIFICANT BYTE

ACK

AD5311

START

COND

MASTER

ADDRESS BYTE

MOST SIGNIFICANT BYTE

ACK

MASTER

*THIS BIT MUST BE 0 IN THE 6-PIN SOT-23 VERSION.

Figure 28. AD5311 Readback Sequence

SCL

SDA

SCL

SDA

PD1

PD0

D11

D10

000

A1*

NO ACK

MASTER

STOP

COND

MASTER

LEAST SIGNIFICANT BYTE

ACK

AD5321

START

COND

MASTER

ADDRESS BYTE

MOST SIGNIFICANT BYTE

ACK

MASTER

*THIS BIT MUST BE 0 IN THE 6-PIN SOT-23 VERSION.

Figure 29. AD5321 Readback Sequence

of the eight data bits in the DAC register. However, in the

case of the AD5311 and AD5321, the readback consists of two

bytes that contain both the data and the power-down mode bits.

The read operations for the three DACs are shown in the figures

below.

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