AD7376 datasheet(7/12 Pages) AD

7 / 12 page

AD7376

–7–

REV. 0

PARAMETRIC TEST CIRCUITS

VMS

DUT

V+ = VDD

1LSB = V+/128

V+

Figure 31. Potentiometer Divider Nonlinearity Error Test

Circuit (INL, DNL)

NO CONNECT

VMS

DUT

Figure 32. Resistor Position Nonlinearity Error (Rheostat

Operation; R-INL, R-DNL)

RW =

V+

VDD

VW2 - (VW1 + IW [RAW||RBW])

AND VW2 = VMS WHEN IW = 1/R

WHERE VW1 = VMS WHEN IW = 0

IMS

IW = 1V/RNOMINAL

DUT

V+

VMS

Figure 33. Wiper Resistance Test Circuit

PSS (%/%) =

VMS%

V+%

PSRR (dB) = 20LOG

VMS

V+

(

V+ = VDD 10% OR VSS 10%

VDD

VMS

V+

Figure 34. Power Supply Sensitivity Test Circuit

(PSS, PSRR)

DUT

VIN

+18V

VOUT

–18V

OP275

Figure 35. Inverting Programmable Gain Test Circuit

–18V

DUT

VIN

+18V

VOUT

OP275

Figure 36. Noninverting Programmable Gain Test Circuit

–18V

DUT

VIN

+18V

VOUT

OP275

Figure 37. Gain vs. Frequency Test Circuit

SUPPLY VOLTAGE (VDD) – Volts

3.5

510

3.0

1.0

2.5

2.0

VA = +5V

VB = 0V

VSS = 0V

0.5

1.5

Figure 29. Input Logic Threshold Voltage vs.

VDD Supply Voltage

VDD = +15V

VSS = –15V

VDD = +5V

VSS = 0V OR –5V

VLOGIC

510

800

1600

400

1200

Figure 30. Supply Current (IDD) vs. Logic Voltage

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