AD8313

–16–

REV. B

8-Lead

SOIC Package

(RM-08)

8

5

4

1

0.122 (3.10)

0.114 (2.90)

0.199 (5.05)

0.187 (4.75)

PIN 1

0.0256 (0.65) BSC

0.122 (3.10)

0.114 (2.90)

SEATING

PLANE

0.006 (0.15)

0.002 (0.05)

0.018 (0.46)

0.008 (0.20)

0.043 (1.09)

0.037 (0.94)

0.120 (3.05)

0.112 (2.84)

0.011 (0.28)

0.003 (0.08)

0.028 (0.71)

0.016 (0.41)

33

27

0.120 (3.05)

0.112 (2.84)

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

C2

680pF

C1

680pF

R2

10

C3

0.1 F

R1

10

1

2

3

4

VPOS

VOUT

INHI

INLO

VPOS PWDN

COMM

VSET

AD8313

8

7

6

5

L/R

53.6

C4

0.1 F

SIG IN

R11

0

R7

0

R8

20k

R3

R4

R5

0

R6

C6

VOUT

EXT VSET

EXT ENABLE

SW1

Figure 44. Evaluation Board Schematic

48

54.4

90.6

28

20

27.5

75

50

20

19

50

35

41

22

46

48

51.7

91.3

51

10

16

126

TRACE WIDTH

15.4

NOT CRITICAL DIMENSIONS

UNIT = MILS

Figure 45. Detail of PCB Footprint for Package and Pads for Matching Network