OPTION_REG datasheet(156/222 Pages) MICROCHIP

Il numero della parte	OPTION_REG

Spiegazioni elettronici	Digitally Enhanced Power Analog Controller with Integrated Synchronous Driver

PDF	222 Pages

Scroll/Zoom	100%

Produttore elettronici	MICROCHIP [Microchip Technology]

Homepage	http://www.microchip.com

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156 / 222 page

FIGURE 27-9:

I2C SLAVE, 7-BIT ADDRESS, RECEPTION (SEN = 1, AHEN = 1, DHEN = 1)

Receiving Address

Receive Data

A7 A6 A5 A4 A3 A2 A1

D7 D6 D5 D4 D3 D2 D1 D0

SDA

SCL

SSPIF

ACKDT

CKP

ACK

Cleared by software

ACKTIM is cleared by hardware

SSPBUF can be

Set by software,

read any time before

next byte is loaded

release SCL

on 9th rising edge of SCL

Received

address is loaded into

SSPBUF

Slave software clears

ACKDT to ACK

R/W = 0

Master releases

SDA to slave for ACK sequence

the received byte

When AHEN = 1;

on the 8th falling edge

of SCL of an address

byte, CKP is cleared

ACKTIM is set by hardware

on 8th falling edge of SCL

When DHEN = 1;

on the 8th falling edge

of SCL of a received

data byte, CKP is cleared

Received data is

available on SSPBUF

Slave sends

not ACK

CKP is not cleared

if not ACK

Master sends

Stop condition

No interrupt after

if not ACK

from Slave

ACKTIM

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