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AP7175 Scheda tecnica(PDF) 2 Page - Diodes Incorporated |
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AP7175 Scheda tecnica(HTML) 2 Page - Diodes Incorporated |
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2 / 14 page ![]() AP7175 Document number: DS35606 Rev. 3 - 2 2 of 14 www.diodes.com December 2012 © Diodes Incorporated AP7175 Pin Descriptions Pin Name Pin Number Function SO-8EP MSOP-8EP GND 1 1 Ground FB 2 2 Feedback to set the output voltage via an external resistor divider between VOUT and GND. VOUT 3/4 3/4 Power Output Pin. Connect at least 10µF capacitor to this pin to improve transient response and required for stability. When the part is disabled the output is discharged via an internal pull-low MOSFET. VIN 5 5 Power Input Pin for current supply. Connect a decoupling capacitor ( ≥10µF) as close as possible to the pin for noise filtering. VCNTL 6 6 BIAS supply for the controller, recommended 5V. Connect a decoupling capacitor ( ≥1µF) as close as possible to the pin for noise filtering. PG 7 7 Power Good output open drain to indicate the status of VOUT via monitoring the FB pin. This pin is pulled low when the voltage is outside the limits, during thermal shutdown and if either VCNTL or VIN go below their thresholds. EN 8 8 Enable pin. Driving this pin low will disable the part. When left floating an internal current source will pull this pin high and enable it. PAD EP EP Exposed pad connect this to VIN for good thermal conductivity. Functional Block Diagram |
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