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PCF8523TS/1 Scheda tecnica(PDF) 42 Page - NXP Semiconductors |
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PCF8523TS/1 Scheda tecnica(HTML) 42 Page - NXP Semiconductors |
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42 / 75 page ![]() PCF8523 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 4 — 5 July 2012 42 of 74 NXP Semiconductors PCF8523 Real-Time Clock (RTC) and calendar (1) Indicates normal duration of INT1 pulse. The timing shown for clearing CTAF is also valid for the non-pulsed interrupt mode, that is, when TAM set logic 0, where the INT1 pulse may be shortened by setting CTAIE logic 0. Fig 25. Example of shortening the INT1 pulse by clearing the CTAF flag 013aaa334 01 countdown counter CDTF INT1 SCL instruction n CLEAR INSTRUCTION (1) |
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