LP8556 datasheet(9/52 Pages) TI

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LP8556

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SNVS871B – JULY 2012 – REVISED SEPTEMBER 2012

PWM Interface Characteristics

(1)

Symbol

Parameter

Condition

Min

Typ

Max

Units

fPWM

PWM Frequency Range(2)

25000

tMIN_ON

Minimum Pulse ON time

μs

tMIN_OFF

Minimum Pulse OFF time

Turn on delay from standby to

PWM input active, VDDIO pin transitions

tSTARTUP

backlight on

from 0V to 1.8V.

tSTBY

Turn off delay

PWM input low time for turn off

PWMRES

PWM Input Resolution

fIN < 9.0 kHz

bits

(1)

Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the

most likely norm.

(2)

Guaranteed by design and not tested in production.

Logic Interface Characteristics

(1)

Symbol

Parameter

Condition

Min

Typ

Max

Units

Logic Inputs (PWM, SDA, SCL)

0.3 X

VIL

Input Low Level

VDDIO

0.7 X

VIH

Input High Level

VDDIO

(VDDIO = 0V or 3.6V) AND

-1.0

1.0

Input Current

μA

(VI = 0V or 3.6V)

Logic Outputs (SDA)

VOL

Output Low Level

IOUT = 3 mA (pull-up current)

0.3

0.4

Output Leakage Current

VOUT = 5V

-1.0

1.0

μA

(1)

Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the

most likely norm.

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