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Wi.DP1205-915-R Scheda tecnica(PDF) 13 Page - List of Unclassifed Manufacturers |
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Wi.DP1205-915-R Scheda tecnica(HTML) 13 Page - List of Unclassifed Manufacturers |
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13 / 18 page ![]() WI.DP1205-XXX-R DATASHEET 12 6. Serial Control Interface The XE1205 contains two SPI-compatible serial interfaces, one to send and read the chip configuration, the other to send and receive data in buffered mode. Both interfaces are configured in slave mode and share the same pins MISO (Master In Slave Out), MOSI (Master Out Slave In), SCK (Serial Clock). Two additional pins are required to select the SPI interface: NSS_CONFIG to change or read the transceiver configuration, and NSS_DATA to send or read data. Figure 3 show the connections between the transceiver and a microcontroller when buffered mode is used. Figure 3: Serial Control Interface Chapter 6 |
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