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SN6501DBVT Scheda tecnica(PDF) 2 Page - Texas Instruments |
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SN6501DBVT Scheda tecnica(HTML) 2 Page - Texas Instruments |
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2 / 29 page ![]() 50W VIN 10µF 3 1 SN6501 5 2 4 D2 D1 VCC GND GND 50W 1 5 2 3 4 D1 V CC D2 GND GND OSC Q Q SN6501 Gate Drive D1 V CC D2 GND GND SN6501 SLLSEA0E – FEBRUARY 2012 – REVISED JANUARY 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. FUNCTIONAL BLOCK DIAGRAM PIN FUNCTIONS PIN No. NAME DESCRIPTION 1 D1 Drain 1 2 Vcc Supply voltage 3 D2 Drain 2 4,5 GND Ground SPACER SPACER TEST CIRCUIT Figure 2. Test Circuit for RON, fSW, fSt, tr-D, tf-D, tBBM 2 Submit Documentation Feedback Copyright © 2012–2013, Texas Instruments Incorporated Product Folder Links :SN6501 |
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