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HT85F2270 Scheda tecnica(PDF) 65 Page - Holtek Semiconductor Inc |
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HT85F2270 Scheda tecnica(HTML) 65 Page - Holtek Semiconductor Inc |
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65 / 226 page ![]() Rev. 1.00 6� of ��6 �a� 1�� �01� Standard 8051 8-Bit Flash MCU HT85F2260/HT85F2270/HT85F2280 PLL Control Register – PLLCR SFR Address: EDh Bit 7 6 5 4 3 2 1 0 Name PLLEN PLLRDY — PLLSRC — PLL�� PLL�1 PLL�0 R/W R/W R — R/W — R/W R/W R/W POR 0 0 — 0 — 0 0 0 Bit 7 PLLEN: PLL enable/disable control 0: PLL disable 1: PLL enable Bit 6 PLLRDY: PLL output ready indication flag 0: Not ready 1: Ready After the PLL is enabled this bit is used to indicate when the PLL is locked and ready for use. This bit will be initially cleared to zero by hardware when the device is powered on. The bit will be cleared to zero if the PLL is in use and is then disabled but will not be cleared if the PLL changes frequency. Bit 5 Unimplemented, read as “0” Bit 4 PLLSRC: PLL Clock Source Select 0: HIRC clock source 1: HXT clock source Note that if the PLL clock source is selected to be the external oscillator, HXT, the crystal frequency should be 4MHz. Bit 3 Unimplemented, read as “0” Bit 2~0 PLLM2, PLLM1, PLLM0: PLL Frequency Multiplier select 000: ×1 001: ×2 010: ×3 011: ×4 100: ×5 101: ×6 110: ×7 111: ×8 |
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