LMZ14202H

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SNVS691D – JANUARY 2011 – REVISED FEBRUARY 2013

CURRENT LIMIT

Current limit detection is carried out during the off-time by monitoring the current in the synchronous MOSFET.

Referring to the Functional Block Diagram, when the top MOSFET is turned off, the inductor current flows

limit comparator disables the start of the next on-time period. The next switching cycle will occur only if the FB

intervals for the top MOSFET will not occur. Switching frequency is lower during current limit due to the longer

off-time. It should also be noted that DC current limit varies with duty cycle, switching frequency, and

temperature.

THERMAL PROTECTION

The junction temperature of the LMZ14202H should not be allowed to exceed its maximum ratings. Thermal

protection is implemented by an internal Thermal Shutdown circuit which activates at 165 °C (typ) causing the

additionally the CSS capacitor is discharged to ground. Thermal protection helps prevent catastrophic failures for

accidental device overheating. When the junction temperature falls back below 145 °C (typ Hyst = 20 °C) the SS

ZERO COIL CURRENT DETECTION

The current of the lower (synchronous) MOSFET is monitored by a zero coil current detection circuit which

inhibits the synchronous MOSFET when its current reaches zero until the next on-time. This circuit enables the

DCM operating mode, which improves efficiency at light loads.

PRE-BIASED STARTUP

The LMZ14202H will properly start up into a pre-biased output. This is startup situation is common in multiple rail

logic applications where current paths may exist between different power rails during the startup sequence. The

pre-bias level of the output voltage must be less than the input UVLO set point. This will prevent the output pre-

bias from enabling the regulator through the high side MOSFET body diode.

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