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STM32F051C4 Scheda tecnica(PDF) 69 Page - STMicroelectronics |
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STM32F051C4 Scheda tecnica(HTML) 69 Page - STMicroelectronics |
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69 / 104 page ![]() Electrical characteristics STM32F051x 70/105 Doc ID 022265 Rev 3 All I/Os are CMOS and TTL compliant (no software configuration required). Their characteristics cover more than the strict CMOS-technology or TTL parameters. The coverage of these requirements is shown in Figure 16 and Figure 17 for standard I/Os, and in Figure 18 and Figure 19 for 5 V tolerant I/Os. Ilkg Input leakage current (3) VSS ≤ VIN ≤ VDD I/O TC, FT and FTf -- ±0.1 µA VSS ≤ VIN ≤ VDD 2 V ≤ VDD ≤ VDDA ≤ 3.6 V I/O TTa used in digital mode -- ±0.1 VIN= 5 V I/O FT and FTf -- 10 VIN= 3.6 V, 2 V ≤ VDD ≤ VIN VDDA = 3.6 V I/O TTa used in digital mode -- 1 VSS ≤ VIN ≤ VDDA 2 V ≤ VDD ≤ VDDA ≤ 3.6 V I/O TTa used in analog mode -- ±0.2 RPU Weak pull-up equivalent resistor(4) VIN = VSS 30 40 50 k Ω RPD Weak pull-down equivalent resistor(4) VIN = VDD 30 40 50 k Ω CIO I/O pin capacitance - 5 - pF 1. To sustain a voltage higher than VDD+0.3 the internal pull-up/pull-down resistors must be disabled. 2. Hysteresis voltage between Schmitt trigger switching levels. Data based on characterization, not tested in production. 3. Leakage could be higher than max. if negative current is injected on adjacent pins. 4. Pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This MOS/NMOS contribution to the series resistance is minimum (~10% order) . Table 50. I/O static characteristics (continued) Symbol Parameter Conditions Min Typ Max Unit |
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