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M93C76M93C76-R Scheda tecnica(PDF) 18 Page - STMicroelectronics

Il numero della parte M93C76M93C76-R
Spiegazioni elettronici  16-Kbit, 8-Kbit, 4-Kbit, 2-Kbit and 1-Kbit (8-bit or 16-bit wide) MICROWIRE serial access EEPROM
PDF  33 Pages
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Produttore elettronici  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M93C76M93C76-R Scheda tecnica(HTML) 18 Page - STMicroelectronics

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Clock pulse counter
M93C86xx M93C76xx M93C66xx M93C56xx M93C46xx
18/33
DocID4997 Rev 13
8
Clock pulse counter
In a noisy environment, the number of pulses received on Serial Clock (C) may be greater
than the number delivered by the master (the microcontroller). This can lead to a
misalignment of the instruction of one or more bits (as shown in Figure 7) and may lead to
the writing of erroneous data at an erroneous address.
To avoid this problem, the M93Cx6 has an on-chip counter that counts the clock pulses from
the start bit until the falling edge of the Chip Select Input (S). If the number of clock pulses
received is not the number expected, the WRITE, ERASE, ERAL or WRAL instruction is
aborted, and the contents of the memory are not modified.
The number of clock cycles expected for each instruction, and for each member of the
M93Cx6 family, are summarized in Table 4: Instruction set for the M93C46 to Table 6:
Instruction set for the M93C76 and M93C86. For example, a Write Data to Memory (WRITE)
instruction on the M93C56 (or M93C66) expects 20 clock cycles (for the x8 organization)
from the start bit to the falling edge of Chip Select Input (S). That is:
1 Start bit
+ 2 Op-code bits
+ 9 Address bits
+ 8 Data bits
Figure 7. Write sequence with one clock glitch
AI01395
S
An-1
C
D
WRITE
START
D0
"1"
"0"
An
Glitch
An-2
ADDRESS AND DATA
ARE SHIFTED BY ONE BIT



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