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MPC875CVR133 Scheda tecnica(PDF) 52 Page - Freescale Semiconductor, Inc

Il numero della parte MPC875CVR133
Spiegazioni elettronici  MPC875/MPC870 PowerQUICC??Hardware Specifications
PDF  84 Pages
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Produttore elettronici  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC875CVR133 Scheda tecnica(HTML) 52 Page - Freescale Semiconductor, Inc

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MPC875/MPC870 PowerQUICC™ Hardware Specifications, Rev. 4
52
Freescale Semiconductor
CPM Electrical Characteristics
Figure 48. SI Receive Timing Diagram with Normal Clocking (DSC = 0)
83a
L1RCLKB, L1TCLKB width high (DSC = 1)3
P + 10
—
ns
84
L1CLKB edge to L1CLKOB valid (DSC = 1)
—
30.00
ns
85
L1RQB valid before falling edge of L1TSYNCB4
1.00
—
L1TCLK
86
L1GRB setup time2
42.00
—
ns
87
L1GRB hold time
42.00
—
ns
88
L1CLKB edge to L1SYNCB valid (FSD = 00) CNT = 0000, BYT = 0,
DSC = 0)
—0.00
ns
1 The ratio SYNCCLK/L1RCLKB must be greater than 2.5/1.
2 These specs are valid for IDL mode only.
3 Where P = 1/CLKOUT. Thus, for a 25-MHz CLKO1 rate, P = 40 ns.
4 These strobes and TxD on the first bit of the frame become valid after the L1CLKB edge or L1SYNCB, whichever comes later.
Table 21. SI Timing (continued)
Num
Characteristic
All Frequencies
Unit
Min
Max
L1RXDB
(Input)
L1RCLKB
(FE = 0, CE = 0)
(Input)
L1RCLKB
(FE = 1, CE = 1)
(Input)
L1RSYNCB
(Input)
L1ST(2–1)
(Output)
71
72
70
71a
RFSD=1
75
73
74
77
78
76
79
BIT0



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