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MPC5534MVM66 Scheda tecnica(PDF) 39 Page - Freescale Semiconductor, Inc |
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MPC5534MVM66 Scheda tecnica(HTML) 39 Page - Freescale Semiconductor, Inc |
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39 / 60 page ![]() Electrical Characteristics MPC5534 Microcontroller Data Sheet, Rev. 6 Freescale Semiconductor 39 3.13.7 eMIOS Timing Figure 17. eMIOS Timing 3.13.8 DSPI Timing Table 25. eMIOS Timing 1 1 eMIOS timing specified at: V DDEH = 3.0–5.25 V and TA = TL to TH. Spec Characteristic Symbol Min. Max. Unit 1 eMIOS input pulse width tMIPW 4— tCYC 2 eMIOS output pulse width tMOPW 1 2 2 This specification does not include the rise and fall times. When calculating the minimum eMIOS pulse width, include the rise and fall times defined in the slew rate control field (SRC) in the pad configuration register (PCR). —tCYC Table 26. DSPI Timing 1, 2 Spec Characteristic Symbol 40 MHz 66 MHz 80 MHz Unit Min. Max Min. Max Min. Max 1 SCK cycle time 3, 4 tSCK 48.8 ns 5.8 ms 28.4 ns 3.5 ms 24.4 ns 2.9 ms — 2 PCS to SCK delay5 tCSC 46 —26 — 22 —ns 3 After SCK delay6 tASC 45 —25 — 21 —ns 4 SCK duty cycle tSDC (tSCK 2) – 2 ns (tSCK 2) + 2 ns (tSCK 2) – 2 ns (tSCK 2) + 2 ns (tSCK 2) – 2 ns (tSCK 2) + 2 ns ns 5 Slave access time (SS active to SOUT driven) tA — 25 — 25 — 25 ns 6 Slave SOUT disable time (SS inactive to SOUT Hi-Z, or invalid) tDIS — 25 — 25 — 25 ns 7PCSx to PCSS time tPCSC 4 —4 — 4 —ns 1 2 eMIOS output eMIOS input |
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