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DP83620 Scheda tecnica(PDF) 71 Page - Texas Instruments

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Il numero della parte DP83620
Spiegazioni elettronici  Deterministic, Low Transmit and Receive Latency, Selectable Frequency Synchronized Clock Output, Dynamic Link Quality Monitoring
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DP83620 Scheda tecnica(HTML) 71 Page - Texas Instruments

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SNLS339C – JANUARY 2011 – REVISED APRIL 2013
Table 10-3. Basic Mode Control Register (BMCR), address 0x00 (continued)
Bit
Bit Name
Default
Description
9
RESTART
0, RW/SC
Restart Auto-Negotiation:
AUTO-NEGOTIATION
1 = Restart Auto-Negotiation. Re-initiates the Auto-Negotiation process. If Auto-
Negotiation is disabled (bit 12 = 0), this bit is ignored. This bit is self-clearing and will
return a value of 1 until Auto-Negotiation is initiated, whereupon it will self-clear.
Operation of the Auto-Negotiation process is not affected by the management entity
clearing this bit.
0 = Normal operation.
8
DUPLEX MODE
Strap, RW
Duplex Mode:
When auto-negotiation is disabled writing to this bit allows the port Duplex capability to
be selected.
1 = Full Duplex operation.
0 = Half Duplex operation.
7
COLLISION TEST
0, RW
Collision Test:
1 = Collision test enabled.
0 = Normal operation.
When set, this bit will cause the COL signal to be asserted in response to the assertion
of TX_EN within 512-bit times. The COL signal will be de-asserted within 4-bit times in
response to the de-assertion of TX_EN.
6
RESERVED
0, RO
RESERVED: Write ignored, read as 0.
5
UNIDIRECTIONAL
0, RW
Unidirectional Enable:
ENABLE
1 = Allow 100 Mb transmit activity independent of link status.
0 = Require link up for 100 Mb/s transmit activity.
This bit has no effect in 10 Mb/s mode.
4:0
RESERVED
0 0000, RO
RESERVED: Write ignored, read as 0.
10.1.2 Basic Mode Status Register (BMSR)
Table 10-4. Basic Mode Status Register (BMSR), address 0x01
Bit
Bit Name
Default
Description
15
100BASE-T4
0, RO/P
100BASE-T4 Capable:
0 = Device not able to perform 100BASE-T4 mode.
14
100BASE-TX
1, RO/P
100BASE-TX Full Duplex Capable:
FULL DUPLEX
1 = Device able to perform 100BASE-TX in full duplex mode.
13
100BASE-TX 0
1, RO/P
100BASE-TX Half Duplex Capable:
HALF DUPLEX
1 = Device able to perform 100BASE-TX in half duplex mode.
12
10BASE-T
1, RO/P
10BASE-T Full Duplex Capable:
FULL DUPLEX
1 = Device able to perform 10BASE-T in full duplex mode.
11
10BASE-T
1, RO/P
10BASE-T Half Duplex Capable:
HALF DUPLEX
1 = Device able to perform 10BASE-T in half duplex mode.
10:8
RESERVED
000, RO
RESERVED: Write as 0, read as 0.
7
UNIDIRECTIONAL
1, RO/P
Unidirectional Ability:
ABILITY
1 = Device able to transmit in 100 Mb/s mode independent of link status.
6
MF PREAMBLE
1, RO/P
Preamble Suppression Capable:
SUPPRESSION
1 = Device able to perform management transaction with preamble suppressed, 32-bits of
preamble needed only once after reset, invalid opcode or invalid turnaround.
0 = Normal management operation.
5
AUTO-NEGOTIATION
0, RO
Auto-Negotiation Complete:
COMPLETE
1 = Auto-Negotiation process complete.
0 = Auto-Negotiation process not complete.
Copyright © 2011–2013, Texas Instruments Incorporated
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