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L6470H Scheda tecnica(PDF) 13 Page - STMicroelectronics |
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L6470H Scheda tecnica(HTML) 13 Page - STMicroelectronics |
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13 / 70 page ![]() L6470 Electrical characteristics Doc ID16737 Rev 5 13/70 Logic inputs and outputs VIL Low logic level input voltage 0.8 V VIH High logic level input voltage 2 V IIH High logic level input current (4) VIN = 5 V 1 µA IIL Low logic level input current (5) VIN = 0 V -1 µA VOL Low logic level output voltage (6) VDD = 3.3 V, IOL = 4 mA 0.3 V VDD = 5 V, IOL = 4 mA 0.3 VOH High logic level output voltage VDD = 3.3 V, IOH = 4 mA 2.4 V VDD = 5 V, IOH = 4 mA 4.7 RPU RPD CS pull-up and STBY pull-down resistors CS = GND; STBY/RST = 5 V 335 430 565 k Ω Ilogic Internal logic supply current 3.3 V VREG externally supplied, internal oscillator 3.7 4.3 mA Ilogic,STBY Standby mode internal logic supply current 3.3 V VREG externally supplied 22.5 µA fSTCK Step-clock input frequency 2 MHz Internal oscillator and external oscillator driver fosc,i Internal oscillator frequency Tj = 25 °C, VREG = 3.3 V -3% 16 +3% MHz fosc,e Programmable external oscillator frequency 8 32 MHz VOSCOUTH OSCOUT clock source high level voltage Internal oscillator 3.3 V VREG externally supplied; IOSCOUT = 4 mA 2.4 V VOSCOUTL OSCOUT clock source low level voltage Internal oscillator 3.3 V VREG externally supplied; IOSCOUT = 4 mA 0.3 V trOSCOUT tfOSCOUT OSCOUT clock source rise and fall time Internal oscillator 20 ns textosc Internal to external oscillator switching delay 3 ms tintosc External to internal oscillator switching delay 1.5 µs SPI fCK,MAX Maximum SPI clock frequency (7) 5MHz trCK tfCK SPI clock rise and fall time (7) CL = 30 pF 25 ns thCK tlCK SPI clock high and low time (7) 75 ns tsetCS Chip select setup time (7) 350 ns Table 5. Electrical characteristics (continued) Symbol Parameter Test condition Min. Typ. Max. Unit |
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