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PIC18F2525IP Scheda tecnica(PDF) 115 Page - Microchip Technology

Il numero della parte PIC18F2525IP
Spiegazioni elettronici  28/40/44-Pin Enhanced Flash Microcontrollers with 10-Bit A/D and nanoWatt Technology
PDF  412 Pages
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Produttore elettronici  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC18F2525IP Scheda tecnica(HTML) 115 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS39626E-page 113
PIC18F2525/2620/4525/4620
REGISTER 10-3:
INTCON3: INTERRUPT CONTROL REGISTER 3
R/W-1
R/W-1
U-0
R/W-0
R/W-0
U-0
R/W-0
R/W-0
INT2IP
INT1IP
—
INT2IE
INT1IE
—
INT2IF
INT1IF
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
INT2IP: INT2 External Interrupt Priority bit
1
=High priority
0
= Low priority
bit 6
INT1IP: INT1 External Interrupt Priority bit
1
=High priority
0
= Low priority
bit 5
Unimplemented: Read as ‘0’
bit 4
INT2IE: INT2 External Interrupt Enable bit
1
= Enables the INT2 external interrupt
0
= Disables the INT2 external interrupt
bit 3
INT1IE: INT1 External Interrupt Enable bit
1
= Enables the INT1 external interrupt
0
= Disables the INT1 external interrupt
bit 2
Unimplemented: Read as ‘0’
bit 1
INT2IF: INT2 External Interrupt Flag bit
1
= The INT2 external interrupt occurred (must be cleared in software)
0
= The INT2 external interrupt did not occur
bit 0
INT1IF: INT1 External Interrupt Flag bit
1
= The INT1 external interrupt occurred (must be cleared in software)
0
= The INT1 external interrupt did not occur
Note:
Interrupt flag bits are set when an interrupt condition occurs, regardless of the state of its corresponding
enable bit or the global interrupt enable bit. User software should ensure the appropriate interrupt flag bits
are clear prior to enabling an interrupt. This feature allows for software polling.



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