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STU5N95K3 Scheda tecnica(PDF) 5 Page - STMicroelectronics |
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STU5N95K3 Scheda tecnica(HTML) 5 Page - STMicroelectronics |
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5 / 23 page ![]() DocID15696 Rev 3 5/23 STD5N95K3, STF5N95K3, STP5N95K3, STU5N95K3 Electrical characteristics The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the usage of external components. Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit td(on) Turn-on delay time VDD = 475 V, ID = 2 A, RG = 4.7 Ω, VGS = 10 V (see Figure 19) -17 - ns tr Rise time - 7 - ns td(off) Turn-off-delay time - 32 - ns tf Fall time - 18 - ns Table 7. Source drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit ISD Source-drain current - 4 A ISDM (1) 1. Pulse width limited by safe operating area Source-drain current (pulsed) - 16 A VSD (2) 2. Pulsed: pulse duration = 300 µs, duty cycle 1.5% Forward on voltage ISD = 4 A, VGS = 0 - 1.6 V trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs VDD= 60 V (see Figure 21) -410 ns Qrr Reverse recovery charge - 3.5 µC IRRM Reverse recovery current - 17 A trr Reverse recovery time ISD = 4 A, di/dt = 100 A/µs VDD= 60 V TJ = 150 °C (see Figure 21) -516 ns Qrr Reverse recovery charge - 4.1 µC IRRM Reverse recovery current - 16 A Table 8. Gate-source Zener diode Symbol Parameter Test conditions Min. Typ. Max. Unit V(BR)GSO Gate-source breakdown voltage IGS= ± 1 mA, ID=0 30 - - V |
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