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AD822 Scheda tecnica(PDF) 81 Page - Analog Devices |
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AD822 Scheda tecnica(HTML) 81 Page - Analog Devices |
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81 / 88 page ![]() ADuC841/ADuC842/ADuC843 Rev. 0 | Page 81 of 88 Parameter I2C COMPATIBLE INTERFACE TIMING Min Max Unit tL SCLOCK Low Pulse Width 1.3 µs tH SCLOCK High Pulse Width 0.6 µs tSHD Start Condition Hold Time 0.6 µs tDSU Data Setup Time 100 µs tDHD Data Hold Time 0.9 µs tRSU Setup Time for Repeated Start 0.6 µs tPSU Stop Condition Setup Time 0.6 µs tBUF Bus Free Time between a Stop Conditionand a Start Condition 1.3 µs tR Rise Time of Both SCLOCK and SDATA 300 ns tF Fall Time of Both SCLOCK and SDATA 300 ns tSUP1 Pulse Width of Spike Suppressed 50 ns 1Input filtering on both the SCLOCK and SDATA inputs suppresses noise spikes less than 50 ns. MSB tBUF SDATA (I/O) SCLK (I) STOP CONDITION START CONDITION REPEATED START LSB ACK MSB 1 2-7 8 9 1 S(R) PS tPSU tDSU tSHD tDHD tSUP tDSU tDHD tH tSUP tL tRSU tR tR tF tF Figure 90. I2C Compatible Interface Timing |
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