DSPIC33FJ256GP710T datasheet(73/322 Pages) MICROCHIP

73 / 322 page

DS70286C-page 71

dsPIC33FJXXXGPX06/X08/X10

5.0

FLASH PROGRAM MEMORY

The dsPIC33FJXXXGPX06/X08/X10 devices contain

internal Flash program memory for storing and

executing application code. The memory is readable,

writable and erasable during normal operation over the

entire VDD range.

Flash memory can be programmed in two ways:

In-Circuit Serial Programming™ (ICSP™)

programming capability

Run-Time Self-Programming (RTSP)

ICSP allows a dsPIC33FJXXXGPX06/X08/X10 device

to be serially programmed while in the end application

circuit. This is simply done with two lines for

programming clock and programming data (one of the

alternate programming pin pairs: PGECx/PGEDx), and

three other lines for power (VDD), ground (VSS) and

Master Clear (MCLR). This allows customers to manu-

facture boards with unprogrammed devices and then

program the digital signal controller just before shipping

the product. This also allows the most recent firmware

or a custom firmware to be programmed.

RTSP is accomplished using TBLRD (table read) and

TBLWT

(table write) instructions. With RTSP, the user

can write program memory data either in blocks or

‘rows’ of 64 instructions (192 bytes) at a time or a single

program memory word, and erase program memory in

blocks or ‘pages’ of 512 instructions (1536 bytes) at a

time.

5.1

Table Instructions and Flash

Programming

Regardless of the method used, all programming of

Flash memory is done with the table read and table

write instructions. These allow direct read and write

access to the program memory space from the data

memory while the device is in normal operating mode.

The 24-bit target address in the program memory is

formed using bits<7:0> of the TBLPAG register and the

Effective Address (EA) from a W register specified in

the table instruction, as shown in Figure 5-1.

The TBLRDL and the TBLWTL instructions are used to

read or write to bits<15:0> of program memory.

TBLRDL

and TBLWTL can access program memory in

both Word and Byte modes.

The TBLRDH and TBLWTH instructions are used to read

or write to bits<23:16> of program memory. TBLRDH

and TBLWTH can also access program memory in Word

or Byte mode.

FIGURE 5-1:

ADDRESSING FOR TABLE REGISTERS

Note:

This data sheet summarizes the features

of the dsPIC33FJXXXGPX06/X08/X10

family of devices. However, it is not

intended to be a comprehensive reference

source. To complement the information in

this data sheet, refer to Section 5. “Flash

Programming”

(DS70191)

the

“dsPIC33F Family Reference Manual”,

which is available from the Microchip web

site (www.microchip.com).

Program Counter

24 bits

Program Counter

TBLPAG Reg

8 bits

Working Reg EA

16 bits

Byte

24-bit EA

1/0

Select

Using

Table Instruction

Using

User/Configuration

Space Select

DSPIC33FJ256GP710T Scheda tecnica(PDF) 73 Page - Microchip Technology

DSPIC33FJ256GP710T Scheda tecnica(HTML) 73 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Scheda tecnica Scarica

Link URL