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AD9512BCPZ Scheda tecnica(PDF) 23 Page - Analog Devices |
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AD9512BCPZ Scheda tecnica(HTML) 23 Page - Analog Devices |
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23 / 48 page ![]() AD9512 Rev. A | Page 23 of 48 SYNC STATUS SYNC STATUS SCLK SDIO SDO CSB SERIAL CONTROL PORT FUNCTION SYNCB, RESETB PDB DSYNC DSYNCB DETECT SYNC VREF RSET AD9512 GND VS CLK1 CLK1B CLK2 CLK2B PROGRAMMABLE DIVIDERS AND PHASE ADJUST OUT0 OUT0B LVPECL /1, /2, /3... /31, /32 OUT1 OUT1B LVPECL /1, /2, /3... /31, /32 OUT2 OUT2B LVPECL /1, /2, /3... /31, /32 OUT3 OUT3B LVDS/CMOS /1, /2, /3... /31, /32 OUT4 OUT4B LVDS/CMOS /1, /2, /3... /31, /32 DELAY ADJUST ΔT Figure 23. Functional Block Diagram Showing Maximum Frequencies |
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