EPC2 datasheet(23/26 Pages) ALTERA

23 / 26 page

Pin Information

Page 23

Configuration Devices for SRAM-Based LUT Devices

January 2012

Altera Corporation

TCK

N/A

Input

JTAG clock pin. Connect this pin to GND if the JTAG

circuitry is not used.

This pin is only available in EPC2 devices.

VCCSEL

N/A

Input

Mode select for VCC supply. VCCSEL must be connected to

GND if the device uses a 5.0-V power supply (VCC = 5.0 V).

VCCSEL

must be connected to VCC if the device uses a

3.3-V power supply (VCC = 3.3 V).

This pin is only available in EPC2 devices.

VPPSEL

N/A

Input

Mode select for V

PP. supply. VPPSEL must be connected to

GND if VPP uses a 5.0-V power supply (VPP = 5.0 V).

VPPSEL

must be connected to VCC if VPP uses a 3.3-V

power supply (VPP = 3.3 V).

This pin is only available in EPC2 devices.

VPP

N/A

Power

Programming power pin. For the EPC2 device, this pin is

normally tied to VCC. If the VCC of the EPC2 device is 3.3 V,

tie VPP to 5.0 V to improve ISP time. For EPC1 and

EPC1441 devices, VPP must be tied to VCC.

This pin is only available in EPC2 devices.

VCC

7, 8

Power

Power pin.

GND

Ground

Ground pin. Place a 0.2-µF decoupling capacitor between

the VCC and GND pins.

Notes to Table 20:

(1) This package is available for EPC1 and EPC1441 devices only.

(2) This package is available for EPC2 and EPC1441 devices only.

Table 20. EPC1, EPC2, and EPC1441 Device Pin Functions During Configuration (Part 3 of 3)

Pin Name

Pin Number

Pin Type

Description

8-Pin

PDIP (1)

20-Pin

PLCC

32-Pin

TQFP (2)

EPC2 Scheda tecnica(PDF) 23 Page - Altera Corporation

EPC2 Scheda tecnica(HTML) 23 Page - Altera Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Scheda tecnica Scarica

Link URL