AD9912

Rev. F | Page 4 of 40

SPECIFICATIONS

DC SPECIFICATIONS

AVDD = 1.8 V ± 5%, AVDD3 = 3.3 V ± 5%, DVDD = 1.8 V ± 5%, DVDD_I/O = 3.3 V ± 5%, AVSS = 0 V, DVSS = 0 V, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

SUPPLY VOLTAGE

DVDD_I/O (Pin 1)

3.135

3.30

3.465

V

DVDD (Pin 3, Pin 5, Pin 7)

1.71

1.80

1.89

V

AVDD3 (Pin 14, Pin 46, Pin 47, Pin 49)

3.135

3.30

3.465

V

AVDD3 (Pin 37)

1.71

3.30

3.465

V

Pin 37 is typically 3.3 V but can be set to 1.8 V

AVDD (Pin 11, Pin 19, Pin 23 to Pin 26, Pin 29,

Pin 30, Pin 36, Pin 42, Pin 44, Pin 45, Pin 53)

1.71

1.80

1.89

V

SUPPLY CURRENT

See also the Total Power Dissipation

specifications

8

9.6

mA

CMOS output driver at 3.3 V, 50 MHz, with

5 pF load

26

31

mA

Pin 30, Pin 36, Pin 42, Pin 44, Pin 45)

113

136

mA

Aggregate analog supply, with system

clock PLL, HSTL output driver, and S-divider

enabled

40

48

mA

DAC power supply

205

246

mA

Digital core (SpurKiller off )

2

3

mA

Digital I/O (varies dynamically)

LOGIC INPUTS (Except Pin 32)

Pin 9, Pin 10, Pin 54, Pin 55, Pin 58 to Pin 61,

Pin 63, Pin 64

2.0

DVDD_I/O

V

DVSS

0.8

V

±60

±200

μA

3

pF

CLKMODESEL (Pin 32) LOGIC INPUT

Pin 32 only

1.4

AVDD

V

AVSS

0.4

V

−18

−50

μA

3

pF

LOGIC OUTPUTS

Pin 62 and the following bidirectional pins:

Pin 9, Pin 10, Pin 54, Pin 55, Pin 63

2.7

DVDD_I/O

V

DVSS

0.4

V

FDBK_IN INPUT

Pin 40, Pin 41

Input Capacitance

3

pF

Input Resistance

18

22

26

kΩ

Differential

Differential Input Voltage Swing

225

mV p-p

Equivalent to 112.5 mV swing on each leg;

must be ac-coupled